SIL3 TMR triple redundant CPU for Tricon SIS safety system, dual-core high-speed processor, executes ESD/BMS interlock logic, full system self-diagnosis, hot-sw... ...
SIL3 TMR triple redundant CPU for Tricon SIS safety system, dual-core high-speed processor, executes ESD/BMS interlock logic, full system self-diagnosis, hot-sw... ...
SIL3 TMR triple redundant CPU for legacy Tricon SIS, 50MHz core, 16MB memory, min 15ms scan cycle, executes ESD/BMS safety logic, full self-diagnosis, hot-swap,... ...
Woodward 5461-002 Digital Speed / Actuator Controller Product ManualI. Product O ...
SIL3 TMR inter-controller communication module for Tricon CX SIS, high-speed fiber copper interface for peer-to-peer data exchange between multiple Tricon contr... ...
SIL3 TMR combined DI/DO card for Triconex Trident SIS, 32-channel 24–125VDC discrete input + 32-channel discrete output, optical isolation, full channel diagnos... ...